1. Field of the Invention
The present invention relates to a matched filter circuit, particularly to a matched filter used in a signal reception apparatus of a direct sequence code division multiple access (DS-CDMA) communication system.
2. Prior Art
Recently, a spread spectrum communication system, particularly the DS-CDMA communication system, attracts attention in the field of mobile radio system and of cordless local area network (LAN).
In the DS-CDMA system, at a transmitter side, the transmission data is modulated and then spreaded by a PN-code, and at a receiver side, the received signal is despread by the PN-code so that the transmission data is reproduced. A sliding correlator or a matched filter is used for the despreading. The sliding correlator is small in circuit size but needs a long time for the correlation calculation. While, the matched filter is fast in correlation calculation but is rather big in circuit size.
The conventional matched filter consists of a charge coupled device (CCD), a surface acoustic wave (SAW) device, or a digital circuit. A matched filter is proposed in a Patent Publication Hei06-164320 by the inventors of the present invention, which consists of an analog circuit and is of high speed as well as low power consumption. The matched filter includes a sampling and holding circuit for holding a plurality of input analog signals as discrete data, a plurality of multiplication circuits for multiplying the analog signals by multipliers that are shifted and circulated and an adder for summing the multiplied data up.
The matched filter is of a large circuit size because a lot of sampling and holding circuits and peripheral circuits such as refreshing circuits are needed.
The present invention has an object to provide a matched filter circuit of small circuit size with preserving the characteristics of low power consumption.
A matched filter according to the present invention includes an A/D converter for converting successive analog input voltage signals into a digital voltage signals and calculates multiplication and addition of the successive digital signals. The addition is performed by an analog current addition circuit, an analog voltage addition circuit or a digital voltage addition circuit.